You think you are true know memory? Be sold computer again was cheated!

Breath out, everybody is good, I am 79

Memory price still was in 2016 glide ceaselessly

But arrived now

Memory price rises one year the form of 3 times

Did you become confused? ? ?

You think you are true know memory? Be sold computer again was cheated!

Q: How has memory just calculated?

What can notice normally when memory of our choose and buy is the algebra of memory, capacity and memory frequency, but the friend that has demand exceeding frequency needs to pay close attention to sequential this parameter, namely 4 numbers above memory bar, when the algebra of memory, capacity and memory frequency are consistent, sequential is lower, memory is better.

You think you are true know memory? Be sold computer again was cheated!

Q: What is sequential after all?

We are general to the introduction of memory sequential number " A-B-C-D " part corresponding parameter is " CL-tRCD-tRP-tRAS " , their meaning is ordinal for: CAS Latency (abbreviation CL is worth) time of memory CAS defer, it is one of important parameter of memory, the memory of certain brand can imprint CL value on the label of memory bar, the first number is most significant, express to register read take a command to output the defer between data to the first (CAS Latency) , namely CL value, the unit is clock cycle. The 2nd number represents the reaction time that this is fore-and-aft address pulse controller of memory travel address charges beforehand time (RAS Precharge) , namely TRP. Show memory visits the time interval that begins afresh all right from the end. The 3rd number states from memory travel address arrives the defer time of an address (RAS To CAS Delay) , namely TRCD. The 4th number shows Act-to-Precharge Precharge Delay of activationary time of controller of memory travel address (TRAS) . This is 4 sequential adjustment that the player pays close attention to most, in much advocate board in BIOS can set, firm of memory model group also calculated rolled out group of model of the low defer under JEDEC attestation standard memory exceeding frequency, below same frequency set, lowest " 2-2-2-5 " the memory model group of sequential of this kind of alignment can be brought really than " 3-4-4-8 " higher memory performance, extent is in 3 to 5 percent.

You think you are true know memory? Be sold computer again was cheated!

Q: Memory and total defer time, what concerns again?

Lift an example to be calculated total defer time, for instance its access time is memory of a DDR333 6ns, and cycle of its memory clock is 6ns (frequency of memory of =1X2/ of cycle of DDR memory clock, DDR400 memory frequency is 400, calculable when giving its, bell cycle is 5ns) . We are in advocate board its CL setting is BIOS lieutenant general 2.5, total defer time =6ns X2.5+6ns=21ns, and if CL is installed for 2, so total defer time =6ns X2+6ns=18 Ns, reduced the time of 3ns.

Defer parameter means the response rate of memory, the meaning with DDR3 1600CL9 and 1600 CL9 of DDR3 1866CL11 citing is:

The defer below the frequency of 1600MHz 9 clock, (1/1600MHz) second of accept of *9 = 5.625

1866CL11: (1/1866MHz) second of accept of *11 = 5.895

See bandwidth again: (here calculates by double passageway, namely memory wide a 128bit)

1600: 1600MHz * 128bit / 8 = 25600MB/S

1866: 1866MHz * 128bit / 8 = 29856MB/S

You think you are true know memory? Be sold computer again was cheated!

Q: Above look completely not to understand, can you nod again simply?

We are reading CPU the process when keeping memory stereo change, point to Boss of CPU assimilate to the work efficiency of employee defer of number of employee of bandwidth assimilate to BOSS of employee of memory assimilate to, BOSS should notify employee above all, I need the data of which report, after employee obtains this injunction, till he is collected from preparative material expect, this paragraph of time is the defer parameter of memory, after getting ready when material, CPU begins to read keep memory, this moment, memory bandwidth has main effect, finish according to transmitting till number. Next CPU should be read the next time above act repeats when keeping memory. If we undertake the memory such as video apply colours to a drawing takes up tall and successive when, so bandwidth impact is big; When if we just undertake,be being operated daily, criterion if computer is inserted,what defer influence needs to notice greatly is went up the Ddr4 computer of a 2400mhz and 2666mhz also is met automatic parameter taller memory parameter reduces 2400mhz to move.

You think you are true know memory? Be sold computer again was cheated!

In lifting an example DDR4 2400 14 CL and DDR4 2400 16CL to use a process to experience difference daily in us casually completely negligible not plan, but if be in price difference is not big, and frequency is same CL (sequential) below lower circumstance, we choose the memory bar with inferior sequential to undertake buying as far as possible, the grain that uses because of its is major quality is better, exceed frequency stability more easily to move for example the B Die grain of SamSung, if you are a lover exceeding frequency, can choose more high frequency rate to cut the memory with inferior sequential, the promotion that although be mixed to game,uses daily is not apparent, but after all mosquito leg also is the flesh.

You think you are true know memory? Be sold computer again was cheated!

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